1. Field of the Invention
The present invention generally relates to a display synchronization signal generation in a digital broadcast receiver, and more particularly, to a display synchronization signal generation apparatus and method, which make it possible to display a stable image irrespective of changes in transmission speed of a received broadcast signal, and a decoder suitable for the synchronization signal generation apparatus.
2. Description of the Related Art
A purpose of digital broadcasting is to provide users with video and audio of higher quality than analog broadcasting system and to support bi-directional communication. Such digital broadcasting is transferred to a digital broadcast receiver via a ground wave, satellite, or cable in the form of a motion picture experts group (MPEG)-transport stream (TS).
MPEG-TS data includes video and audio information of a plurality of programs along with additional information required for broadcasting. Once the digital broadcast receiver receives the MPEG-TS, it selects a channel and a program by carrying out MPEG decoding, divides audio and video signals from the selected program, and outputs the divided audio and video signals. At this time, a transmission speed of the MPEG-TS and a frequency of a system clock signal used in MPEG decoding are linked to each other.
Thus, when the transmission speed of the MPEG-TS changes, the frequency of the system clock signal used in the MPEG decoding also changes. In other words, as the transmission speed of the MPEG-TS decreases, the frequency of the system clock signal used in MPEG decoding decreases, and on the other hand, as the transmission speed of the MPEG-TS increases, the frequency of the system clock signal used in MPEG decoding increases. The transmission speed of the MPEG-TS data may vary according to broadcasting stations, programs, and camera properties.
In the digital broadcast receiver, a graphics processor manages video output, and uses a pixel clock signal as a reference clock. The pixel clock signal is linked to the system clock signal used in MPEG decoding. Thus, as the transmission speed of the MPEG-TS changes, the frequencies of the system clock signal used in MPEG decoding and the pixel clock signal also change. If the frequency of the pixel clock changes, changes also occur in the frequencies of a horizontal synchronization signal and a vertical synchronization signal that are used to output a video from the graphics processor.
The graphics processor reads video data stored in a memory by using the horizontal synchronization signal and the vertical synchronization signal, which are generated using the pixel clock signal, and outputs the video data to a display device. Thus, if the frequencies of the horizontal synchronization signal and the vertical synchronization signal change, the frequencies of a horizontal synchronization signal and a vertical synchronization signal of the video data output to the display device from the graphics processor are also subject to change.
However, in general, a flat panel display device is designed to operate with a horizontal synchronization signal of a fixed frequency. Therefore, as described above, if the video data in which the frequency of the horizontal synchronization signal changes is provided to the display device, problems such as horizontal waves, backlight out, or color flickering are caused in an output display screen. As a result, a stable image cannot be displayed.